addressing decode meaning in Chinese

定址译码

2 . quick check and verify for address decoding or data transceiver circuits , which designed
2 .可快速验证cv - 16解码电路之8bit或16bit资料读写值是否正确
The main circuit adopt boost converter topology ; the control circuit is made up of adsp - 21065l core processor , a / d converter and cpld which realize the functions of digital pulse width modulation ( dpwm ) and address decoding ; the auxiliary power supply afford work voltage of every device
。 st变换器拓扑结构；控制电路主要由核处理器adsp 、 21065l 、 al3转换器和实现dpwm及地址解码功能的cpld等器件组成；辅助电源电路为控制电路中各器件提供工作电压。
It emphatically describes address decoding circuit and controling circuit of fpga in hardware , and describes dma transmission mode and disposing of the interrupt in driver , and describes how to get data from wav file , and how to organize data before transmition , and how to chose appropriate quantity of data transmition every time in application
着重阐述了硬件设计中fpga内部重要的译码及控制电路设计,驱动程序中dma ( directmemoryaccess )的传输及中断处理,应用程序中对于两个声音文件数据的正确获取、组合及分割等问题。